Verilog HDL design examples / by Joseph Cavanagh [author.].

By:

Cavanagh, Joseph [ author]

Material type: Text

TextPublication details: Boca Raton : CRC Press, Taylor & Francis Group, CRC Press is an imprint of the Taylor & Francis Group, an informa business, 2018Edition: 1st edDescription: xvii, 655 p. : ill. ; 26 cmISBN:

9780367778811

Subject(s):

DDC classification:

621.381 23 CAV

Contents:

Introduction to Logic Design Using Verilog HDL.

Combinational Logic Design Using Verilog HDL.

Sequential Logic Design Using Verilog HDL.

Computer Arithmetic Design Using Verilog HDL.

Appendix A: Event Queue.

Appendix B: Verilog Project Procedure.

Appendix C: Answers to Select Problems

Summary: The book presents the Verilog language with a variety of examples to provide a firm foundation in the design of the digital system using Verilog HDL. It places emphasis on the detailed design of various Verilog projects that include the design module, test bench module, and outputs from the simulator illustrating

Item type:

Books List(s) this item appears in: Electronics & Communication Engineering

Tags from this library: No tags from this library for this title. Log in to add tags.

Average rating: 0.0 (0 votes)

Holdings
Item type	Current library	Collection	Shelving location	Call number	Copy number	Status	Barcode
Books	KU Central Library	Rack No. : 62 Shelve No. : B-02	General Stack (Issuable Books)	621.381 CAV 2020 (Browse shelf(Opens below))	C-3 (I)	Not For Loan	52141
Books	KU Central Library	Rack No. : 62 Shelve No. : B-02	General Stack (Issuable Books)	621.381 CAV 2020 (Browse shelf(Opens below))	C-4 (I)	Not For Loan	52142
Books	KU Central Library	Rack No. : 62 Shelve No. : B-02	General Stack (Issuable Books)	621.381 CAV 2020 (Browse shelf(Opens below))	C-5 (I)	Not For Loan	52143
Books	KU Central Library	Rack No. : 31 Annex : 01 Shelve No. : A-01	Reference Section (Non-Issuable Books)	621.381 CAV 2020 (Browse shelf(Opens below))	C-1 (NI)	Not For Loan	52140
Books	KU Central Library	Rack No. : 31 Annex : 01 Shelve No. : A-01	Reference Section (Non-Issuable Books)	621.381 CAV 2020 (Browse shelf(Opens below))	C-2 (NI)	Not For Loan	52139

Introduction to Logic Design Using Verilog HDL.

Combinational Logic Design Using Verilog HDL.

Sequential Logic Design Using Verilog HDL.

Computer Arithmetic Design Using Verilog HDL.

Appendix A: Event Queue.

Appendix B: Verilog Project Procedure.

Appendix C: Answers to Select Problems

The book presents the Verilog language with a variety of examples to provide a firm foundation in the design of the digital system using Verilog HDL. It places emphasis on the detailed design of various Verilog projects that include the design module, test bench module, and outputs from the simulator illustrating

There are no comments on this title.

to post a comment.

Click on an image to view it in the image viewer